Without the ability to address memory, the 6516 CPU would be very limited, since it only has a few registers with which to store and process data. Addressing memory, however, is often more complicated than one might initially imagine, since one needs to be able to effectively reference data on the stack, perform array indexing operations, and also perform pointer operations.
The following addressing modes are supported by the 6516:
Immediate 8/16: used to quickly load a value into registers. The scale of the register determines the size of the immediate value.
Relative 8/16: used when branching or calling subroutines; the immediate value is relative to the PC register.
Note: PC will be pointing at the next instruction, so a BR -4 will enter an infinite loop.
Absolute 19: the operand specifies the full 19 bits of the address to reference.
Indirect 19: The operand specifies the full 19 bits of the address to reference, which is then dereferenced once more. Because only a word can be read from memory, the top two bits of the original address are maintained. As such, you can only indirect within the same bank.
Relative BP: The operand specifies an offset from BP.
Indirect BP: The operand specifies an offset from BP, which is then dereferenced again. The bank will always be 0x00.
Absolute D: The value in the D register is used as the memory reference, which can be absolutely indexed.
Indirect D: The value in the D register is used as the memory reference (which can be absolutely indexed), which is then dereferenced again.
In each all but the immediate and relative addressing modes, the memory reference can be further indexed by the X and Y registers. The X register is added before any dereferencing that might occur, and the Y register is added after any dereferencing that might occur. This allows for easy array indexing.
Each addressing mode is encoded in the instructions using the following pattern:
7 6 5 4 3 2 1 0
m m i x y b b b
The two ms above map into four possible addressing modes, with i indicating if the mode is indirect. Each mode is also able to be indexed by X and Y. Each b indicates the bank used for addressing (part of the 19-bit address line).
The matrix looks like this, which reveals a total of thirty-two addressing modes.
7 6 5 4 3 2 1 0 | Addressing Mode
------------------|--------------------------------------------------------------
0 0 0 0 0 . . . | Immediate (Relative when used with branches)
0 0 0 0 1 . . . | Immediate + Y
0 0 0 1 0 . . . | Immediate + X
0 0 0 1 1 . . . | Immediate + X + Y
0 0 1 0 0 . . . | Immediate Indirect*
0 0 1 0 1 . . . | Immediate Indirect, then indexed by Y*
0 0 1 1 0 . . . | Immediate Indirect indexed by X*
0 0 1 1 1 . . . | Immediate Indirect indexed by X, then indexed by Y*
0 1 0 0 0 . . . | Absolute
0 1 0 0 1 . . . | Absolute + Y
0 1 0 1 0 . . . | Absolute + X
0 1 0 1 1 . . . | Absolute + X + Y
0 1 1 0 0 . . . | Indirect
0 1 1 0 1 . . . | Indirect, then indexed by Y
0 1 1 1 0 . . . | Indirect indexed by X
0 1 1 1 1 . . . | Indirect indexed by X, then indexed by Y
1 0 0 0 0 . . . | BP-relative
1 0 0 0 1 . . . | BP-relative indexed by Y
1 0 0 1 0 . . . | BP-relative indexed by X
1 0 0 1 1 . . . | BP-relative indexed by X and Y
1 0 1 0 0 . . . | Indirect BP-relative
1 0 1 0 1 . . . | Indirect BP-relative, then indexed by Y
1 0 1 1 0 . . . | Indirect BP-relative indexed by X
1 0 1 1 1 . . . | Indirect BP-relative indexed by X, then indexed by Y
1 1 0 0 0 . . . | D + Immediate offset
1 1 0 0 1 . . . | D + Immediate offset indexed by Y
1 1 0 1 0 . . . | D + Immediate offset indexed by X
1 1 0 1 1 . . . | D + Immediate offset indexed by X and Y
1 1 1 0 0 . . . | Indirect D + Immediate offset
1 1 1 0 1 . . . | Indirect D + Immediate offset, then indexed by Y
1 1 1 1 0 . . . | Indirect D + Immediate offset, indexed by X
1 1 1 1 1 . . . | Indirect D + Immediate offset, indexed by X, then Y